1. Field of the Invention
The present invention relates to a method of forming a semiconductor device. More particularly, the present invention relates to a method of forming a contact.
2. Description of the Related Art
In the development of integrated circuits, a device can operate faster at a lower power rating through a reduction in the size of the device. However, the miniaturization of devices has encountered a barrier due to a bottleneck in the fabrication technique and an increase in production cost. As a result, other types of miniaturization techniques have been developed to improve the driving current of devices. One proposed solution to relieve the limit of device miniaturization includes controlling the stress at the channel region of a transistor. Through the application of some stress, the distance between silicon atoms in the silicon crystal is reduced so that the mobility of electrons and holes are increased. Ultimately, the performance of the device is improved.
At present, one method of improving the performance of the device by controlling the channel stress includes forming a silicon nitride layer that serves a contact etching stop layer. The silicon nitride layer provides the necessary stress for increasing the driving current of the device and enhancing the device performance. Nevertheless, the aforesaid method has some problems that are difficult to remove. Thus, the overall performance of the device is still substantially limited.
FIGS. 1A through 1E are schematic cross-sectional views showing the conventional method for forming a contact. First, as shown in FIG. 1A, a plurality of metal-oxide-semiconductor (MOS) transistors 102 is formed on the substrate 100 such that a spacer 104 is located between two adjacent MOS transistors 102.
As shown in FIG. 1B, a silicon nitride layer 106 serving as a stress layer is formed over the substrate 100. The silicon nitride layer 106 covers the entire substrate 100 and the MOS transistors 102. Typically, the thickness of the silicon nitride layer 106 is related to the stress value. That is, the thicker the silicon nitride layer 106, the higher will be the stress. Hence, to enhance the performance of the device through thickening the silicon nitride layer, a seam 108 is normally formed in the silicon nitride layer 106 within the spacing 104. The presence of this seam 108 will significantly affect the reliability of subsequent processes.
As shown in FIG. 1C, a dielectric layer 110 is formed over the silicon nitride layer 106. Due to the presence of the seam 108, the dielectric layer 110 can hardly cover the silicon nitride layer 106 completely. In other words, the dielectric layer 110 only fills up a portion of the seam 108. FIG. 2 is an actual photo of a section of the MOS transistors taken using a penetrating electron microscope. As shown in the labeled area 200 of FIG. 2, the dielectric layer 110 is unable to fill up the seam 108 in the silicon nitride layer 106 entirely.
As shown in FIG. 1D, an etching operation is carried out to form a contact opening 114 in the silicon nitride layer 106 and the dielectric layer 110. It should be noted that some residue 112 is formed at the bottom of the contact opening 114 after the silicon nitride layer 106 and the dielectric layer 110 are etched due to the presence of the seam 108 in the silicon nitride layer 106. FIG. 3 is another photo of a section of the MOS transistor taken using a penetrating electron microscope. The residue is shown within the area labeled 300 of FIG. 3.
As shown in FIG. 1E, metallic material is deposited into the contact opening 114 to form a metallic material layer and a contact 116. However, the residue 112 at the bottom of the contact opening 114 will increase the resistance of the contact 116 considerably. Sometimes, a short circuit between the contact 116 and the MOS transistor 102 may form resulting in a significant drop in the reliability and performance of the device.
Therefore, a method capable of producing sufficient stress in the silicon nitride layer to enhance device performance and yet capable of preventing the film defects in the silicon nitride layer formed in the manufacturing process from affecting the reliability and performance of the device is a major research topic.